ADLINK cPC1-3840 CPU module
Introduction
The cPC1-3840 is designed to be a high performance dual slot 3U
CompactPCl CPU Module. lt features a single Intel® Pentium® M
processor with 1MB L2 cache in a 478-pin Micro-FCPGA package
and is validated with the Intel@ 855GME chipset that supports
144-bit wide PC2100/2700(2661333 MHz)registered ECC DDR
DlMM up to a maximum of 2GB. The cPCl-3840 also features the
Intel@ 82546EB Dual Port Gigabit Ethernet Controller and sup
ports one ATA33/66/100 lDE channel, one Compact Flash type l/l
connector, and 2 ports SATA for high volume storage applications
The Intel® Pentium® M is a high performance, low power mobile
processor with several micro-architecture enhancements oyei
existing Intel Mobile processors.Intel@ Pentium® M supports
Intel@ Architecture with Dynamic Execution, on-die primary 32-KB
instruction cache and 32-KB write-back data cache, on-die 1-MB
second level cache with Advanced Transfer Cache Architecture.
Advanced Branch Prediction and Data Prefetch Logic, Streaming
SlMD Extensions 2(SSE2),a 400-MHz Source-Synchronous pro
cessor system bus, and Advanced Power Management features
including Enhanced Intel@ SpeedStep® technology.
The Intel@ Pentium@ M processor system bus supports AGTL+
bus driver technology with integrated GT termination resistors
(gated AGTL+ receivers for reduced power),32-bit AGTL+ bus
addressing(no support for 36-bit address extension),400MT/s
BPSB(100MHz)，2Xaddress，4Xdata,and12deepin-order
aueues.
The Intel® 855GME chipset north bridge contains a Graphics
Memory Controller Hub(GMCH)component for embedded plat-
forms. The GMCH provides the processor interface, system mem
ory interface(DDR SDRAM),hub interface,CRT, and a DVO
interface.The GMCH also supports 128-MB, 256-MB, and 512
MB memory technologies,16 simultaneous open pages, and 64-
bit data interface(72-bit with ECC).
Furthermore,the 855GME features a 350 MHz integrated 24bit
RAMDAC supporting analog display with pixel resolution up to
1600×1200 at 85Hz and 2048×1536 at 75Hz,dual independent
display pipe supporting concurrent or simultaneous display on
